MHZ100Q Documentation

Quad 100 MHz A/D and FPGA Code on Get FPGA-Based Oscilloscope at Fast, secure and Free Open Source software downloadsSourceForge




The input signal is designed for a DC-coupled 50 ohm source. With a 50 Ω resistor connected from the input to ground, the output from the A/D is approximately midrange (hex 0x80). The input range is -0.25 to +0.25 volts or 0.5 volts peak-to-peak for full-scale. (The A/D range is ± 0.512 volts, and the amplifier is set for a gain of 2.)


The board has been built, and operation verified. Detailed SNR and other distortion measurements have not yet been done.


Hardware needed:

Software needed to use:

Software needed to recompile the firmware:

This project's software is designed for a PC running a recent version of Linux. The high-speed processing is done in the FPGA, so a relatively modest PC (1GHz) should be adequate. I use Debian, but any distribution that includes Octave and libusb should work.

The VHDL code is written for a Digilent Nexys 2 FPGA board. This board supports multiple versions of the Xilinx FPGA. If you have a different version, you may need to tweak the pinout definitions (the .ucf file) and possibly the timings. See the notes in the VHDL section.

The A/D board can be built using the supplied CAD files. I can supply limited quantities of these boards if you don't care to build your own.

If you want to use this project as an Oscilloscope, you'll probably want a scope probe and a preamp. Most scope probes are designed to work with a 1 Meg Ohm impedance. This A/D has a 50 Ohm input, so you will need a preamp to go with it. I am testing a simple preamp design that's not ready for publication yet - contact me if you want to try it.

The VHDL code is written for the Xilinx WebPACK software. This is available for free download from the Xilinx website.

The Cypress USB firmware is written in C using the SDCC compiler. Note that for Debian you need the non-free version of SDCC. (It's still a zero-cost download; it just doesn't meet all the Debian licensing criteria.)

Those are the big items. This project is still in its early stages, so you may want to doublecheck with me to see if it can do what you want to do.


This process assumes Octave and all other tools are already installed, and that prebuilt versions of all software are available.

FPGA firmware

Download scope_top.mcs to the Nexys2 board using the Digilent ExPort software. ExPort is Windows-only, so a second PC is needed. I install the firmware in the ROM so it stays there when the board is unplugged.

USB firmware

Download the USB firmware to the Nexys2 board using a command of the form
fxload -v -t fx2 -I usb_main.ihex -D /dev/bus/usb/aaa/bbb
where aaa and bbb are the USB bus and device numbers for the Nexys2 board. You can get these numbers from the /proc/bus/usb/devices file.


On my Debian system, I created a file /etc/udev/rules.d/03_local_rules.d which contains the lines (but see update below)

SYSFS{idVendor}=="1443", SYSFS{idProduct}=="0005", MODE="666" SYMLINK+="usb/digilent"

SYSFS{idVendor}=="0547", SYSFS{idProduct}=="2131", MODE="666" SYMLINK+="usb/cy7c68013a"
The command udevcontrol reload_rules (as root) activates these rules.

After I plug in the Nexys2, there's a device /dev/usb/digilent, and I can install the firmware using

fxload -v -t fx2 -I usb_main.ihex -D /dev/usb/digilent

When the firmware is properly loaded, /dev/usb/digilent disappears and is replaced by /dev/usb/cy7c68013a.

December 2010 update

In recent versions of Debian, the operation of udev seems to have changed slightly: the MODE="666" setting seems to have been suppressed, with the result that only root can access the devices. The workaround is to change the rules to

SYSFS{idVendor}=="0547", SYSFS{idProduct}=="2131", MODE="666" GROUP="plugdev" SYMLINK+="usb/cy7c68013a"
SYSFS{idVendor}=="1443", SYSFS{idProduct}=="0005", MODE="666" GROUP="plugdev" SYMLINK+="usb/digilent"
where plugdev can be any group the user is a member of. /dev/group should have an entry similar to
where myuserid is your user login name.

Also, the command udevcontrol reload_rules has changed to udevadm control --reload-rules.

Octave MEX files

The files

implement commands that allow Octave to access the USB device. They need to be in a directory that's included in the Octave path() command.

The Quad A/D PCB

The PCB is a 2-layer board, designed using Kicad. The schematic and PCB files are in the Subversion repository.

Note: as of Aug. 2009, a reader pointed out that some component symbols and footprints are missing. There appears to be a library that needs to be exported. Working on resolving that. In the meantime, here are pdf's of the schematic and board.

The 101227 schematic is redrawn to be easier to read, has additional build notes and component values.

If you're thinking of building the boards, check for recent updates. Known changes:

The Xilinx FPGA VHDL Firmware

The FPGA firmware is currently built using version 10.1 of the Xilinx ISE tool. To build the project, first create a new project file using the ISE GUI. Then, add all files in the src and lib directories to the project. At that point, the project should build OK.

I used default settings for the project properties, except that I enabled packing registers into the I/O blocks. This change is needed to keep the time alignment between the A/D sample outputs and the sampling clock consistent. Here's how to change the setting:

I recently added a build script using the Project -> Build Tcl script option. If you cd to the bld subdirectory and run script, it should create the scope_top.ise project file and then run all the commands to create the scope_top.bit file. (You may need to edit the script to insert the correct path to the xctlsh command.) You still need to use the xilinx iMPACT tool to create the scope_top.mcs file that gets loaded into the onboard PROM; I haven't set up a script to do that yet.

Cypress USB Firmware


Host USB Software




$Date: 2009/06/29 16:27:48 $